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500 ma, low dropout, cmos linear regulator adp1715/adp1716 rev. 0 information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781.329.4700 www.analog.com fax: 781.461.3113 ?2006 analog devices, inc. all rights reserved. features maximum output current: 500 ma input voltage range: 2.5 v to 5.5 v low shutdown current: <1 a low dropout voltage: 250 mv @ 500 ma load 50 mv @ 100 ma load initial accuracy: 1% accuracy over line, load, and temperature: 3% 16 fixed output voltage options with soft start: 0.75 v to 3.3 v (adp1715) adjustable output voltage option: 0.8 v to 5.0 v (adp1715 adjustable) 16 fixed output voltage options with tracking: 0.75 v to 3.3 v (adp1716) stable with small 2.2 f ceramic output capacitor excellent load/line transient response current limit and thermal overload protection logic controlled enable 8-lead thermally enhanced msop package applications notebook computers memory components telecommunications equipment network equipment dsp/fpga/p supplies instrumentation equipment/data acquisition systems typical application circuits gnd 1 gnd 2 gnd 3 gnd 4 8 7 6 en in out ss 5 adp1715 v in = 5v v out = 3.3v 10nf 2.2f 2.2f 06110-001 figure 1. adp1715 with fixed output voltage, 3.3 v gnd 1 gnd 2 gnd 3 gnd 4 8 7 6 en in out adj 5 adp1715 adjustable v in = 5v v out = 0.8(1 + r1/r2) 2.2f 2.2f r1 r2 06110-002 figure 2. adp1715 with adjustable output voltage, 0.8 v to 5.0 v gnd 1 gnd 2 gnd 3 gnd 4 8 7 6 en in out trk 5 a dp1716 v in = 5v v trk = 0v to 5v v out 2.2f 2.2f 3 2 1 0 12345 v out (v) v trk (v) 06110-003 figure 3. adp1716 with output voltage tracking general description the adp1715/adp1716 are low dropout, cmos linear regulators that operate from 2.5 v to 5.5 v and provide up to 500 ma of output current. using an advanced proprietary architecture, they provide high power supply rejection and achieve excellent line and load transient response with just a small 2.2 f ceramic output capacitor. three versions of this part are available, one with fixed output voltage options and variable soft start (adp1715), one with adjustable output voltage and fixed soft start (adp1715 adjustable), and one with voltage tracking in fixed output voltage options (adp1716). the fixed output voltage options are internally set to one of sixteen values between 0.75 v and 3.3 v; the adjustable output voltage can be set to any value between 0.8 v and 5.0 v by an external voltage divider connected from out to adj. the variable soft start uses an external capacitor at ss to control the output voltage ramp. tracking limits the output voltage to the at-or-below voltage at the trk pin. the adp1715/adp1716 are available in 8-lead thermally enhanced msop packages, making them not only a very compact solution but also providing excellent thermal performance for applications requiring up to 500 ma of output current in a small, low profile footprint.
adp1715/adp1716 rev. 0 | page 2 of 20 table of contents features .............................................................................................. 1 applications....................................................................................... 1 typical application circuits............................................................ 1 general description ......................................................................... 1 revision history ............................................................................... 2 specifications..................................................................................... 3 absolute maximum ratings............................................................ 4 thermal resistance ...................................................................... 4 esd caution.................................................................................. 4 pin configurations and function descriptions ........................... 5 typical performance characteristics ............................................. 6 theory of operation ...................................................................... 10 soft-start function (adp1715)................................................ 10 adjustable output voltage (adp1715 adjustable) ............... 11 track mode (adp1716) ............................................................ 11 enable feature ............................................................................ 11 application information................................................................ 12 capacitor selection .................................................................... 12 current limit and thermal overload protection ................. 12 thermal considerations............................................................ 12 printed circuit board layout considerations ....................... 15 outline dimensions ....................................................................... 16 ordering guide .......................................................................... 17 revision history 9/06rev. 0: initial version
adp1715/adp1716 rev. 0 | page 3 of 20 specifications v in = (v out + 0.5 v) or 2.5 v (whichever is greater), i out = 10 ma, c in = c out = 2.2 f, t a = 25c, unless otherwise noted. table 1. parameter symbol conditions min typ max unit input voltage range v in t j = C40c to +125c 2.5 5.5 v operating supply current i gnd i out = 100 a 65 a i out = 100 a, t j = C40c to +125c 100 a i out = 100 ma 160 a i out = 100 ma, t j = C40c to +125c 220 a 100 a < i out < 500 ma, t j = C40c to +125c 650 a shutdown current i gnd-sd en = gnd 0.1 a en = gnd, t j = C40c to +125c 1.0 a fixed output voltage accuracy v out i out = 10 ma C1 +1 % (adp1715 and adp1716 only) i out = 10 ma to 500 ma C2 +2 % 100 a < i out < 500 ma, t j = C40c to +125c C3 +3 % adjustable output voltage v out i out = 10 ma 0.792 0.8 0.808 v accuracy (adp1715 adjustable) 1 i out = 10 ma to 500 ma 0.784 0.816 v 100 a < i out < 500 ma, t j = C40c to +125c 0.776 0.824 v line regulation ?v out /?v in v in = (v out + 0.5 v) to 5.5 v, t j = C40c to +125c C0.15 +0.15 %/ v load regulation 2 ?v out /?i out i out = 10 ma to 500 ma 0.002 %/ma i out = 10 ma to 500 ma, t j = C40c to +125c 0.004 %/ma dropout voltage 3 v dropout i out = 100 ma, v out 3.3 v 50 mv i out = 100 ma, v out 3.3 v, t j = C40c to +125c 100 mv i out = 500 ma, v out 3.3 v 250 300 mv i out = 500 ma, v out 3.3 v, t j = C40c to +125c 400 mv i out = 100 ma, 2.5 v v out < 3.3 v 60 mv i out = 100 ma, 2.5 v v out < 3.3 v, t j = C40c to +125c 100 mv i out = 500 ma, 2.5 v v out < 3.3 v 320 400 mv i out = 500 ma, 2.5 v v out < 3.3 v, t j = C40c to +125c 500 mv start-up time 4 t start-up adp1715 adjustable and adp1716 100 s adp1715 with external soft start c ss = 10 nf 7.3 ms current limit threshold 5 i limit 550 750 1200 ma thermal shutdown threshold ts sd t j rising 150 c thermal shutdown hysteresis ts sd-hys 15 c soft-start source current (adp1715 with external soft start) ss i-source ss = gnd 0.7 1.2 1.7 a v out to v trk accuracy v trk-error 0 v v trk (0.5 v out(nom) ), v out(nom) 1.8 v, t j = C40c to +125c C50 +50 mv (adp1716) 0 v v trk (0.5 v out(nom) ), v out(nom) > 1.8 v, t j = C40c to +125c C100 +100 mv en input logic high v ih 2.5 v v in 5.5 v 1.8 v en input logic low v il 2.5 v v in 5.5 v 0.4 v en input leakage current v i-leakage en = in or gnd 0.1 1 a adj input bias current (adp1715 adjustable) adj i-bias 30 100 na output noise out noise 10 hz to 100 khz, v out = 0.75 v 125 vrms 10 hz to 100 khz, v out = 3.3 v 450 vrms power supply rejection ratio psrr 1 khz, v out = 0.75 v 67 db 1 khz, v out = 3.3 v 53 db 1 accuracy when out is connected directly to adj. when out voltage is set by external feedback resistors, absolute accuracy in a djust mode depends on the tolerances of resistors used. 2 based on an en d-point calculation using 10 ma and 500 ma loads. see figure 8 for typical lo ad regulation performance for loads less than 10 ma. 3 dropout voltage is defined as the input to output voltage differ ential when the input voltage is set to the nominal output vol tage. this applies only for output voltages above 2.5 v. 4 start-up time is defined as the time between the rising edge of en to out being at 95% of its nominal value. 5 current limit threshold is defi ned as the current at which the output voltage dr ops to 90% of the specif ied typical value. for example, the current limit for a 1.0 v output voltage is defined as the curre nt that causes the output voltage to drop to 90% of 1.0 v, or 0.9 v.
adp1715/adp1716 rev. 0 | page 4 of 20 absolute maximum ratings table 2. parameter rating in to gnd C0.3 v to +6 v out to gnd C0.3 v to in en to gnd C0.3 v to +6 v ss/adj/trk to gnd C0.3 v to +6 v storage temperature range C65c to +150c operating junction temperature range C40c to +125c soldering conditions jedec j-std-020 stresses above those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. thermal resistance ja is specified for the worst-case conditions, that is, a device soldered in a circuit board for surface-mount packages. table 3. thermal resistance package type ja unit 8-lead msop 118 c/w esd caution
adp1715/adp1716 rev. 0 | page 5 of 20 pin configurations and function descriptions gnd gnd gnd gnd en in out ss 1 2 3 4 8 7 6 5 adp1715 fixed top view (not to scale) 0 6110-004 gnd gnd gnd gnd en in out adj 1 2 3 4 8 7 6 5 adp1715 adjustable top view (not to scale) 0 6110-005 gnd gnd gnd gnd en in out trk 1 2 3 4 8 7 6 5 adp1716 top view (not to scale) 0 6110-006 figure 4. 8-lead msop (rm-suffix) figure 5. 8-lead msop (rm-suffix) figure 6. 8-lead msop (rm-suffix) table 4. pin function descriptions adp1715 fixed pin no. adp1715 adjustable pin no. adp1716 pin no. mnemonic description 1 1 1 en enable input. drive en high to turn on th e regulator; drive it low to turn off the regulator. for automatic startup, connect en to in. 2 2 2 in regulator input supply. bypass in to gnd with a 2.2 f or greater capacitor. 3 3 3 out regulated output voltage. bypass out to gnd with a 2.2 f or greater capacitor. 4 ss soft start. a capacitor connected to this pin determines the soft-start time. 4 adj adjust. a resistor divider from out to adj sets the output voltage. 4 trk track. the output will follow the voltage placed on the trk pin. (see the theory of operation section for a more detailed description.) 5, 6, 7, 8 5, 6, 7, 8 5, 6, 7, 8 gnd ground.
adp1715/adp1716 rev. 0 | page 6 of 20 typical performance characteristics v in = 3.8 v, i out = 10 ma, c in = 2.2 f, c out = 2.2 f, t a = 25c, unless otherwise noted. ?40 06110-007 t j (c) v out (v) ?5 25 85 125 3.234 3.244 3.254 3.264 3.274 3.284 3.294 3.304 3.314 3.324 3.334 3.344 3.354 3.364 i load = 100a i load = 10ma i load = 100ma i load = 250ma i load = 360ma i load = 500ma figure 7. output voltage vs. junction temperature 3.325 3.265 0.1 1000 06110-008 i load (ma) v out (v) 1 10 100 3.315 3.305 3.295 3.285 3.275 figure 8. output voltage vs. load current 3.325 3.265 3.3 3.8 4.3 4.8 5.3 06110-009 v in (v) v out (v) 3.315 3.305 3.295 3.285 3.275 i load = 100a i load = 10ma i load = 100ma i load = 250ma i load = 360ma i load = 500ma figure 9. output volt age vs. input voltage ?40 06110-010 t j (c) i gnd (a) ?5 25 85 125 0 500 450 400 350 300 250 200 150 100 50 i load = 100a i load = 10ma i load = 100ma i load = 250ma i load = 360ma i load = 500ma figure 10. ground current vs. junction temperature 0.1 1000 06110-011 i load (ma) i gnd (a) 1 10 100 0 500 450 400 350 300 250 200 150 100 50 0 figure 11. ground current vs. load current 600 0 3.3 3.8 4.3 4.8 5.3 06110-012 v in (v) i gnd (a) 500 400 300 200 100 i load = 100a i load = 10ma i load = 100ma i load = 250ma i load = 360ma i load = 500ma figure 12. ground current vs. input voltage
adp1715/adp1716 rev. 0 | page 7 of 20 350 0 0.1 1000 06110-013 i load (ma) v dropout (mv) 300 250 200 150 100 50 1 10 100 figure 13. dropout voltage vs. load current 3.35 2.95 3.2 3.6 06110-014 v in (v) v out (v) 3.30 3.25 3.20 3.15 3.10 3.05 3.00 3.3 3.4 3.5 i load = 100a i load = 10ma i load = 100ma i load = 250ma i load = 360ma i load = 500ma figure 14. output voltage vs. input voltage (in dropout) 700 0 3.20 3.60 06110-015 v in (v) i gnd (a) 600 500 400 300 200 100 3.25 3.30 3.35 3.40 3.45 3.50 3.55 i load = 500ma i load = 360ma i load = 250ma i load = 100ma i load = 10ma i load = 100a figure 15. ground current vs. input voltage (in dropout) 2 1 switch signal to change output load from 25ma to 475ma v out v in = 5v v out = 3.3v c in = 2.2f c out = 2.2f 06110-034 time (10s/div) 5v/di v 50mv/di v figure 16. load transient response 2 1 switch signal to change output load from 25ma to 475ma v out v in = 5v v out = 3.3v c in = 22f c out = 22f 06110-035 time (10s/div) 5v/di v 50mv/di v figure 17. load transient response 2 1 v in step from 4v to 5v v out v in = 5v v out = 3.3v c in = 2.2f c out = 2.2f i load = 500ma 06110-036 time (100s/div) 2v/di v 20mv/di v figure 18. line transient response
adp1715/adp1716 rev. 0 | page 8 of 20 06110-018 c ss (nf) 18 0 02 5 ramp-up time (ms) 16 14 12 10 8 6 4 2 0 ?100 10 10m 06110-020 frequency (hz) psrr (db) 100 1k 10k 100k 1m v ripple = 50mv p-p v in = 5v v out = 0.75v c out = 2.2f i load = 10ma ?10 ?20 ?30 ?40 ?50 ?60 ?70 ?80 ?90 5 101520 figure 19. output voltage ramp-up ti me vs. soft-start capacitor value 0 ?100 10 10m 06110-037 frequency (hz) psrr (db) 100 1k 10k 100k 1m ?10 ?20 ?30 ?40 ?50 ?60 ?70 ?80 ?90 v ripple = 50mv p-p v in = 5v v out = 0.75v c out = 2.2f i load = 100a figure 20. power supply reje ction ratio vs. frequency figure 21. power supply reje ction ratio vs. frequency 0 ?100 10 10m 06110-038 frequency (hz) psrr (db) 100 1k 10k 100k 1m ?10 ?20 ?30 ?40 ?50 ?60 ?70 ?80 ?90 v ripple = 50mv p-p v in = 5v v out = 0.75v c out = 2.2f i load = 100ma figure 22. power supply reje ction ratio vs. frequency
adp1715/adp1716 rev. 0 | page 9 of 20 0 10 10m 06110-039 frequency (hz) psrr (db) 100 1k 10k 100k 1m ?10 ?20 ?30 ?40 ?50 ?60 ?70 ?80 ?90 v ripple = 50mv p-p v in = 5v v out = 3.3v c out = 2.2f i load = 100a figure 23. power supply reje ction ratio vs. frequency 0 ?90 10 10m 06110-019 frequency (hz) psrr (db) ?10 ?20 ?30 ?40 ?50 ?60 ?70 ?80 100 1k 10k 100k 1m v ripple = 50mv p-p v in = 5v v out = 3.3v c out = 2.2f i load = 10ma figure 24. power supply reje ction ratio vs. frequency 0 10 10m 06110-040 frequency (hz) psrr (db) 100 1k 10k 100k 1m ?10 ?20 ?30 ?40 ?50 ?60 ?70 ?80 ?90 v ripple = 50mv p-p v in = 5v v out = 3.3v c out = 2.2f i load = 100ma figure 25. power supply reje ction ratio vs. frequency
adp1715/adp1716 rev. 0 | page 10 of 20 theory of operation the adp1715/adp1716 are low dropout, cmos linear regulators that use an advanced, proprietary architecture to provide high power supply rejection ratio (psrr) and excellent line and load transient response with just a small 2.2 f ceramic output capacitor. both devices operate from a 2.5 v to 5.5 v input rail and provide up to 500 ma of output current. supply current in shutdown mode is typically 100 na. soft start reference current limit thermal protect shutdown gnd out ss/ adj/ trk in en 06110-021 figure 26. internal block diagram internally, the adp1715/adp1716 consist of a reference, an error amplifier, a feedback voltage divider, and a pmos pass transistor. output current is delivered via the pmos pass device, which is controlled by the error amplifier. the error amplifier compares the reference voltage with the feedback voltage from the output and amplifies the difference. if the feedback voltage is lower than the reference voltage, the gate of the pmos device is pulled lower, allowing more current to pass and increasing the output voltage. if the feedback voltage is higher than the reference voltage, the gate of the pmos device is pulled higher, allowing less current to pass and decreasing the output voltage. the adp1715 is available in two versions, one with fixed output voltage options and one with an adjustable output voltage. the fixed output voltage options are set internally to one of sixteen values between 0.75 v and 3.3 v, using an internal feedback network. the adjustable output voltage can be set to between 0.8 v and 5.0 v by an external voltage divider connected from out to adj. the fixed output version of adp1715 allows for connection of an external soft-start capacitor, which controls the output voltage ramp during startup. the adp1716 features a track pin and is available with fixed output voltage options. all devices are controlled by an enable pin (en). soft-start function (adp1715) for applications that require a controlled startup, the adp1715 provides a programmable soft-start function. programmable soft start is useful for reducing inrush current upon startup and for providing voltage sequencing. to implement soft start, connect a small ceramic capacitor from ss to gnd. upon startup, a 1.2 a current source charges this capacitor. the adp1715 start-up output voltage is limited by the voltage at ss, providing a smooth ramp up to the nominal output voltage. the soft-start time is calculated by t ss = v ref ( c ss / i ss ) (1) where: t ss is the soft-start period. v ref is the 0.8 v reference voltage. c ss is the soft-start capacitance from ss to gnd. i ss is the current sourced from ss (1.2 a). when the adp1715 is disabled (using en), the soft-start capacitor is discharged to gnd through an internal 100 resistor. 2 1 en out v in = 5v v out = 3.3v c out = 2.2f c ss = 22nf i load = 500ma 06110-041 time (4ms/div) 2v/di v 1v/di v figure 27. out ramp-up with ex ternal soft-start capacitor the adp1715 adjustable version and the adp1716 have no pins for soft start, so the function is switched to an internal soft- start capacitor. this sets the soft-start ramp-up period to approximately 24 s. for the worst-case output voltage of 5 v, using the suggested 2.2 f output capacitor, the resulting input inrush current is approximately 460 ma, which is less than the maximum 500 ma load current. 2 1 v in =5v v out =1.6v c out =2.2f i load = 10ma out en 06110-042 time (20s/div) 2v/di v 1v/di v figure 28. out ramp-up wi th internal soft-start
adp1715/adp1716 rev. 0 | page 11 of 20 adjustable output voltage (adp1715 adjustable) the adp1715 adjustable version can have its output voltage set over a 0.8 v to 5.0 v range. the output voltage is set by connecting a resistive voltage divider from out to adj. the output voltage is calculated using the equation v out = 0.8 v (1 + r1 / r2 ) (2) where: r1 is the resistor from out to adj. r2 is the resistor from adj to gnd. the maximum bias current into adj is 100 na, so for less than 0.5% error due to the bias current, use values less than 60 k for r2. track mode (adp1716) the adp1716 includes a tracking mode feature. as shown in figure 29 , if the voltage applied at the trk pin is less than the nominal output voltage, out is equal to the voltage at trk. otherwise, out regulates to its nominal output value. 4 05 06110-047 v trk (v) v out (v) 0 3 2 1 1234 figure 29. adp1716 output voltage vs. tracking voltage with nominal output voltage set to 3 v for example, consider an adp1716 with a nominal output voltage of 3 v. if the voltage applied to its trk pin is greater than 3 v, out maintains a nominal output voltage of 3 v. if the voltage applied to trk is reduced below 3 v, out tracks this voltage. out can track the trk pin voltage from the nominal value all the way down to 0 v. a voltage divider is present from trk to the error amplifier input with a divider ratio equal to the divider from out to the error amplifier. this sets the output voltage equal to the tracking voltage. both divider ratios are set by post-package trim, depending on the desired output voltage. enable feature the adp1715/adp1716 use the en pin to enable and disable the out pin under normal operating conditions. as shown in figure 30 , when a rising voltage on en crosses the active threshold, out turns on. when a falling voltage on en crosses the inactive threshold, out turns off. 1 en out v in = 5v v out = 1.6v c out = 2.2f i load = 10ma 06110-043 time (1ms/div) ch1, ch2 (500mv/div) figure 30. adp1715 adjustable typical en pin operation as can be seen, the en pin has hysteresis built in. this prevents on/off oscillations that can occur due to noise on the en pin as it passes through the threshold points. the en pin active/inactive thresholds are derived from the in voltage. therefore, these thresholds vary with changing input voltage. figure 31 shows typical en active/inactive thresholds when the input voltage varies from 2.5 v to 5.5 v. 1.4 0.5 2.50 5.50 06110-044 v in (v) typical en thresholds (v) 1.3 1.2 1.1 1.0 0.9 0.8 0.7 0.6 2.75 3.00 3.25 3.50 3.75 4.00 4.25 4.50 4.75 5.00 5.25 en inactive en active hysteresis figure 31. typical en pin thresholds vs. input voltage
adp1715/adp1716 rev. 0 | page 12 of 20 application information capacitor selection output capacitor the adp1715/adp1716 are designed for operation with small, space-saving ceramic capacitors, but they will function with most commonly used capacitors as long as care is taken about the effective series resistance (esr) value. the esr of the output capacitor affects stability of the ldo control loop. a minimum of 2.2 f capacitance with an esr of 500 m or less is recommended to ensure stability of the adp1715/adp1716. transient response to changes in load current is also affected by output capacitance. using a larger value of output capacitance improves the transient response of the adp1715/adp1716 to large changes in load current. figure 32 and figure 33 show the transient responses for output capacitance values of 2.2 f and 22 f. 2 1 switch signal to change output load from 25ma to 475ma v out v in = 5v v out = 3.3v c in = 2.2f c out = 2.2f 06110-045 time (2s/div) 2v/di v 20mv/di v figure 32. output transient response 2 1 switch signal to change output load from 25ma to 475ma v out v in = 5v v out = 3.3v c in = 22f c out = 22f 06110-046 time (2s/div) 2v/di v 20mv/di v figure 33. output transient response input bypass capacitor connecting a 2.2 f capacitor from the in pin to gnd reduces the circuit sensitivity to printed circuit board (pcb) layout, especially when long input traces, or high source impedance, is encountered. if greater than 2.2 f of output capacitance is required, the input capacitor should be increased to match it. input and output capacitor properties any good quality ceramic capacitors can be used with the adp1715/adp1716, as long as they meet the minimum capacitance and maximum esr requirements. ceramic capacitors are manufactured with a variety of dielectrics, each with different behavior over temperature and applied voltage. capacitors must have a dielectric adequate to ensure the minimum capacitance over the necessary temperature range and dc bias conditions. x5r or x7r dielectrics with a voltage rating of 6.3 v or 10 v are recommended. y5v and z5u dielectrics are not recommended, due to their poor temperature and dc bias characteristics. current limit and thermal overload protection the adp1715/adp1716 are protected against damage due to excessive power dissipation by current and thermal overload protection circuits. the adp1715/adp1716 are designed to current limit when the output load reaches 750 ma (typical). when the output load exceeds 750 ma, the output voltage is reduced to maintain a constant current limit. thermal overload protection is included, which limits the junction temperature to a maximum of 150c (typical). under extreme conditions (that is, high ambient temperature and power dissipation) when the junction temperature starts to rise above 150c, the output is turned off, reducing the output current to zero. when the junction temperature drops below 135c, the output is turned on again and output current is restored to its nominal value. consider the case where a hard short from out to ground occurs. at first the adp1715/adp1716 will current limit, so that only 750 ma is conducted into the short. if self heating of the junction is great enough to cause its temperature to rise above 150c, thermal shutdown will activate, turning off the output and reducing the output current to zero. as the junction temperature cools and drops below 135c, the output turns on and conducts 750 ma into the short, again causing the junction temperature to rise above 150c. this thermal oscillation between 135c and 150c causes a current oscillation between 750 ma and 0 ma that continues as long as the short remains at the output. current and thermal limit protections are intended to protect the device against accidental overload conditions. for reliable operation, device power dissipation should be externally limited so junction temperatures do not exceed 125c. thermal considerations to guarantee reliable operation, the junction temperature of the adp1715/adp1716 should not exceed 125c. to ensure the junction temperature stays below this maximum value, the user
adp1715/adp1716 rev. 0 | page 13 of 20 should be aware of the parameters that contribute to junction temperature changes. these parameters include ambient temperature, power dissipation in the power device, and thermal resistances between the junction and ambient air ( ja ). the ja number is dependent on the package assembly compounds used and the amount of copper to which the gnd pins of the package are soldered to on the pcb. table 5 shows typical ja values of the 8-lead thermally enhanced msop package for various pcb copper sizes. table 5. copper size (mm 2 ) ja (c/w) 0 1 118 100 99 300 77 500 75 700 74 1 device soldered to minimum size pin traces. the junction temperature of the adp1715/adp1716 can be calculated from the following equation: t j = t a + ( p d ja ) (3) where: t a is the ambient temperature. p d is the power dissipation in the die, given by p d = [( v in C v out ) i load ] + ( v in i gnd ) (4) where: i load is the load current. i gnd is ground current. v in and v out are input and output voltages, respectively. power dissipation due to ground current is quite small and can be ignored. therefore, the junction temperature equation simplifies to the following: t j = t a + {[( v in C v out ) i load ] ja } (5) as shown in equation 5, for a given ambient temperature, input to output voltage differential, and continuous load current, there exists a minimum copper size requirement for the pcb to ensure the junction temperature does not rise above 125c. the following figures show junction temperature calculations for different ambient temperatures, load currents, v in to v out differentials, and areas of pcb copper. 140 0 05 06110-022 v in ? v out (v) t j (c) 120 100 80 60 40 20 1234 1ma 10ma 50ma 100ma 250ma 360ma 500ma (load current) do not operate above this point max t j figure 34. 700 mm 2 of pcb copper, t a = 25c 140 0 05 06110-023 v in ? v out (v) t j (c) 120 100 80 60 40 20 1234 1ma 10ma 50ma 100ma 250ma 360ma 500ma (load current) do not operate above this point max t j figure 35. 300 mm 2 of pcb copper, t a = 25c 140 0 05 06110-024 v in ? v out (v) t j (c) 120 100 80 60 40 20 1234 1ma 10ma 50ma 100ma 250ma 360ma 500ma (load current) do not operate above this point max t j figure 36. 100 mm 2 of pcb copper, t a = 25c
adp1715/adp1716 rev. 0 | page 14 of 20 140 0 05 06110-025 v in ? v out (v) t j (c) 120 100 80 60 40 20 1234 1ma 10ma 50ma 100ma 250ma 360ma 500ma (load current) do not operate above this point max t j figure 37. 0 mm 2 of pcb copper, t a = 25c 140 0 05 06110-026 v in ? v out (v) t j (c) 120 100 80 60 40 20 1234 1ma 10ma 50ma 100ma 250ma 360ma 500ma (load current) do not operate above this point max t j figure 38. 700 mm 2 of pcb copper, t a = 50c 140 0 05 06110-027 v in ? v out (v) t j (c) 120 100 80 60 40 20 1234 1ma 10ma 50ma 100ma 250ma 360ma 500ma (load current) do not operate above this point max t j figure 39. 300 mm 2 of pcb copper, t a = 50c 140 0 05 06110-028 v in ? v out (v) t j (c) 120 100 80 60 40 20 1234 1ma 10ma 50ma 100ma 250ma 360ma 500ma (load current) do not operate above this point max t j figure 40. 100 mm 2 of pcb copper, t a = 50c 140 0 05 06110-029 v in ? v out (v) t j (c) 120 100 80 60 40 20 1234 1ma 10ma 50ma 100ma 250ma 360ma 500ma (load current) do not operate above this point max t j figure 41. 0 mm 2 of pcb copper, t a = 50c 140 0 05 06110-030 v in ? v out (v) t j (c) 120 100 80 60 40 20 1234 1ma 10ma 50ma 100ma 250ma 360ma 500ma (load current) do not operate above this point max t j figure 42. 700 mm 2 of pcb copper, t a = 85c
adp1715/adp1716 rev. 0 | page 15 of 20 140 0 0 06110-031 v in ? v out (v) t j (c) 5 120 100 80 60 40 20 1234 1ma 10ma 50ma 100ma 250ma 360ma 500ma (load current) do not operate above this point max t j figure 43. 300 mm 2 of pcb copper, t a = 85c 140 0 05 06110-032 v in ? v out (v) t j (c) 120 100 80 60 40 20 1234 1ma 10ma 50ma 100ma 250ma 360ma 500ma (load current) do not operate above this point max t j figure 44. 100 mm 2 of pcb copper, t a = 85c 140 0 05 06110-033 v in ? v out (v) t j (c) 120 100 80 60 40 20 1234 1ma 10ma 50ma 100ma 250ma 360ma 500ma (load current) do not operate above this point max t j figure 45. 0 mm 2 of pcb copper, t a = 85c printed circuit board layout considerations the 8-lead msop package has the four gnd pins fused together internally, which enhances its thermal characteristics. heat dissipation from the package is increased by connecting as much copper as possible to the four gnd pins of the adp1715/ adp1716. from table 5 it can be seen that a point of diminishing returns eventually is reached, beyond which an increase in the copper size does not yield additional heat dissipation benefits. figure 46 shows a typical layout for the adp1715/adp1716. the four gnd pins are connected to a large copper pad. if a second layer is available, multiple vias can be used to connect them, increasing the overall copper area. the input capacitor should be placed as close as possible to the in and gnd pins. the output capacitor should be placed as close as possible to the out and gnd pins. 0603 or 0402 size capacitors and resistors should be used to achieve the smallest possible footprint solution on boards where area is limited. gnd (top) gnd (bottom) c1 c2 c3 r2 r1 en in out adp1715/ adp1716 06110-048 figure 46. example pcb layout
adp1715/adp1716 rev. 0 | page 16 of 20 outline dimensions compliant to jedec standards mo-187-aa 0.80 0.60 0.40 8 0 4 8 1 5 pin 1 0.65 bsc seating plane 0.38 0.22 1.10 max 3.20 3.00 2.80 coplanarity 0.10 0.23 0.08 3.20 3.00 2.80 5.15 4.90 4.65 0.15 0.00 0.95 0.85 0.75 figure 47. 8-lead mini small outline package [msop] (rm-8) dimensions show in millimeters
adp1715/adp1716 rev. 0 | page 17 of 20 ordering guide model temperature range output voltage (v) package description package option branding adp1715armz-0.75r7 1 C40c to +125c 0.75 8-lead msop rm-8 l29 adp1715armz-0.8-r7 1 C40c to +125c 0.80 8-lead msop rm-8 l2a adp1715armz-0.85r7 1 C40c to +125c 0.85 8-lead msop rm-8 l2c adp1715armz-0.9-r7 1 C40c to +125c 0.90 8-lead msop rm-8 l2d adp1715armz-0.95r7 1 C40c to +125c 0.95 8-lead msop rm-8 l2e adp1715armz-1.0-r7 1 C40c to +125c 1.00 8-lead msop rm-8 l2f adp1715armz-1.05r7 1 C40c to +125c 1.05 8-lead msop rm-8 l2g adp1715armz-1.1-r7 1 C40c to +125c 1.10 8-lead msop rm-8 l2h adp1715armz-1.15r7 1 C40c to +125c 1.15 8-lead msop rm-8 l2j adp1715armz-1.2-r7 1 C40c to +125c 1.20 8-lead msop rm-8 l2k adp1715armz-1.3-r7 1 C40c to +125c 1.30 8-lead msop rm-8 l32 adp1715armz-1.5-r7 1 C40c to +125c 1.50 8-lead msop rm-8 l2l adp1715armz-1.8-r7 1 C40c to +125c 1.80 8-lead msop rm-8 l3r adp1715armz-2.5-r7 1 C40c to +125c 2.50 8-lead msop rm-8 l33 adp1715armz-3.0-r7 1 C40c to +125c 3.00 8-lead msop rm-8 l34 adp1715armz-3.3-r7 1 C40c to +125c 3.30 8-lead msop rm-8 l35 adp1715armz-r7 1 C40c to +125c 0.8 to 5.0 8-lead msop rm-8 l3k adp1716armz-0.75r7 1 C40c to +125c 0.75 8-lead msop rm-8 l2n adp1716armz-0.8-r7 1 C40c to +125c 0.80 8-lead msop rm-8 l2p adp1716armz-0.85r7 1 C40c to +125c 0.85 8-lead msop rm-8 l2q adp1716armz-0.9-r7 1 C40c to +125c 0.90 8-lead msop rm-8 l2r adp1716armz-0.95r7 1 C40c to +125c 0.95 8-lead msop rm-8 l2s adp1716armz-1.0-r7 1 C40c to +125c 1.00 8-lead msop rm-8 l2t adp1716armz-1.05r7 1 C40c to +125c 1.05 8-lead msop rm-8 l3d adp1716armz-1.1-r7 1 C40c to +125c 1.10 8-lead msop rm-8 l2u adp1716armz-1.15r7 1 C40c to +125c 1.15 8-lead msop rm-8 l2 v adp1716armz-1.2-r7 1 C40c to +125c 1.20 8-lead msop rm-8 l2w adp1716armz-1.3-r7 1 C40c to +125c 1.30 8-lead msop rm-8 l2x adp1716armz-1.5-r7 1 C40c to +125c 1.50 8-lead msop rm-8 l2y adp1716armz-1.8-r7 1 C40c to +125c 1.80 8-lead msop rm-8 l31 adp1716armz-2.5-r7 1 C40c to +125c 2.50 8-lead msop rm-8 l37 adp1716armz-3.0-r7 1 C40c to +125c 3.00 8-lead msop rm-8 l38 adp1716armz-3.3-r7 1 C40c to +125c 3.30 8-lead msop rm-8 l39 1 z = pb-free part.
adp1715/adp1716 rev. 0 | page 18 of 20 notes
adp1715/adp1716 rev. 0 | page 19 of 20 notes
adp1715/adp1716 rev. 0 | page 20 of 20 ?2006 analog devices, inc. all rights reserved. trademarks and registered trademarks are the property of their respective owners. d06110-0-9/06(0) notes

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